The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing

Abstract

In order to provide performance increases despite the end of Moore’s law and Dennard scaling, architectures aggressively exploit data- and thread-level parallelism using billions of transistors on a single chip, enabled by extreme geometry miniaturization. A resulting challenge is the control, optimization, and reliable operation of such complex multiprocessing architectures. Modern and future systems will be required to operate under multi-dimensional variability: from varying workload, quality-of-service (QoS) goals, and non-functional requirements to varying environmental and operating conditions. A trend has recently emerged to abstract such complex multiprocessing architectures as self-aware factories whose resources are monitored, configured and their use is planned during runtime. In this article, we present the Information Processing Factory (IPF) paradigm for mixed-criticality. We introduce its 5-layer hierarchical organization and a system configuration framework that ensures that the strict requirements of the safety-critical functions are always met while dynamically managing and optimizing the mixed-critical system at runtime. We illustrate the application of IPF in heterogeneous domains with two representative use-cases (healthcare and automotive), investigate the use of IPF to achieve long-term dependability, and highlight the open challenges. Experimental results report the reliability levels achievable with the proposed paradigm.